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Design Engineer IV (Hardware Board Design Test Engineer)

Location: Milpitas, California 95035
Posted:Thu, February 11, 2021
Salary:Up to US$0.00 per year
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Hardware Board Design and Test Engineer

Location: Milpitas, CA (95035)

Contract Length: 4 months (with opportunity for extension)

**no sponsorship offered or C2C offered

Job Summary:

Do you have a passion working on leading edge technology? Are you passionate about working closely with next generation enterprise SSDs? Are you a fast learner and enjoy synthesizing knowledge in to practice? Western Digital is a leader in the design of world class enterprise class SSD products. We are looking for a strong hardware board design engineer to work on next generation enterprise SSD Development Platforms. The candidate must be a highly motivated self-starter who will thrive in this dynamic, cutting-edge environment. A fundamental part of our strategy is having desirable and powerful Development hardware that enable the experiences enterprise customers want, and elicit their excitement. Creating these platforms involves a close partnership between hardware and Firmware engineers, ASIC designers, and Program team. We are currently building the next generation and we need you!


You are responsible for providing technical leadership in all facets of Board hardware development, focused on Hardware design, testing, validation and production support. You will work with architects and system engineers to test complex digital and analog circuit blocks and an overall FPGA Development Platform for SSD controllers. You will implement or provide leadership to lab team whose tasks will include board bring-up, EVT/DVT testing, and hardware debug. You will also participate in documentation and defining and implementing process for various stages of the development and rack deployment.

Job requirements:

  • Must have great EE fundamentals, FPGA design and analog design and SI experience to support everyday design/validation challenges
  • test and validate switching power supply designs
  • Test and validate signal integrity of interfaces, clocks and peripheral interfaces.
  • define interfaces for FPGA partitioning, design flexible system clocking and reset scheme based on controller specification
  • Define Hardware system architecture of new platforms and perform concept review with development teams
  • Schematics design, manage high density PCB layout design, prototype bring-up and debugging
  • Test and validate NAND, DDR4, PCIe, processors
  • Conduct and review EVT and DVT of different parts of the design and at system level.
  • Ability to communicate with other groups such as Architecture group, ASIC design, FPGA design, Firmware team, program management. Platform related engagement with Procurement, CMs and Finance teams.
  • Lab debug and guiding technicians for rework
  • Rack infrastructure planning and deployment
  • Motivated, self-driven and a Team player is a must
  • Proficiency with Microsoft Office applications such as Word, Excel, and PowerPoint, Visio is required.


  • Bachelor's/Master's degree in Electrical Engineering, or related technical degree is required.

Required Experience:

  • Minimum 8-10 years' experience in board design at component, board, and system levels.
  • Must have experience with schematic capture software (OrCAD) and Layout (Allegro).
  • Must have clear understanding of fundamentals for DFT and DFM.
  • Experience in high speed interface design ( DDR-4, PCIe, SAS, SATA etc.).
  • Practical experience in hardware debug - use of test equipment (Oscilloscope, Logic Analyzer, Chipscope etc.).
  • Must have HW experience designing high density FPGA boards
  • Must have hands-on experience in prototype bring-up and debugging, functional verification and hardware support/sustenance
  • Experience in small embedded systems, and basic processor and DRAM bringup

Desired Experience:

  • Experience with development platforms is a definite plus
  • Basic software development experience using C and/or Linux (Perl/Shell scripting) is a plus
  • Experience with Synplify Premier, Identify debugger, Xilinx Vivado, Xilinx ILA, ARM ICE debuggers
  • High level RTL design experience for FPGAs is definitely a plus.
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